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LUCEDA 2024.09
  • About Luceda
  • Support

Get started

  • Setting up
  • Circuit layout
  • Schematic capture in IPKISS Canvas
  • Circuit simulation
  • Component layout
  • Component models

Learn

  • IPKISS
    • Introduction
    • Guides
      • Technology
      • PDK structure
      • Properties
      • Hierarchical PCells
      • Netlist
      • Parametric Cells
      • The Layout View
      • Boolean Operations
      • Waveguides
      • Placement and routing
      • Routing to the chip edge
      • Bundle routing
      • Creating a hierarchical layout
      • IPKISS Canvas
      • Caphe introduction
      • Circuit simulations
      • Component simulations
        • Physical Device Simulation
        • Device Simulation for Layout Optimisation
        • Enriching PDK Components with Simulated Models
        • Splitter Tree with optimized MMI using Tidy3D
    • Working as a team
    • Glossary
  • AWG Designer
  • IP Manager
  • Simulation links
  • Link for Siemens EDA

Examples

  • Application examples
  • Sample gallery

API documentation

  • API References
  • LA Design Kits
  • Release notes / changelog
Luceda Academy
  • What is IPKISS?
  • Guides
  • Component Simulation

Component Simulation

  • Physical Device Simulation
  • Device Simulation for Layout Optimisation
  • Enriching PDK Components with Simulated Models
  • Splitter Tree with optimized MMI using Tidy3D
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